Integrierte Halbleiterschaltung mit Speicherzellen

Details

Veröffentlichungs-Nr.

EP2533286

Aktenzeichen

EP12167829

Anmeldetag

14. Mai 2012

Veröffentlichung

6. September 2023

Erteilung

6. September 2023

Rechtsraum

EP

IPC

H01L27/02H01L27/118

Abstract

A semiconductor integrated circuit includes a plurality of memory cells (30) arranged in a cell-placement row (31) extending in a first direction (X), a first N well (34) and a first P well (35) arranged in a second direction (Y) perpendicular to the first direction in each area of the memory cells, and a second N well (36) and a second P well (37) each having the same length as a width of the cell-placement row and situated between at least two adjacent memory cells of the plurality of memory cells, wherein the first N well and the second N well are integrated, and the first P well and the second P well are integrated.

Anmelder

Firma

Fujitsu Limited

Land

🇯🇵 Japan

Fachgebiete