Halbleiterbauelement
Anmelder: Renesas Electronics Corporation 🇯🇵
Details
- Veröffentlichungs-Nr.
- EP2597680
- Aktenzeichen
- EP12193092
- Anmeldetag
- 16. November 2012
- Veröffentlichung
- 18. Dezember 2013
- Rechtsraum
- EP
- IPC
- H01L29/78H01L29/10H01L29/06
Abstract
In the interior of a semiconductor substrate having a main surface, a first p - epitaxial region is formed, a second p - epitaxial region is formed on the main surface side, and an n-type drift region and a p-type body region are formed on the main surface side. An n + buried region is formed between the first p - epitaxial region and the second p - epitaxial region in order to electrically isolate the regions. A p + buried region having a p-type impurity concentration higher than that of the second p - epitaxial region is formed between the n + buried region and the second p - epitaxial region. The p + buried region is located at least immediately under the junction between the n-type drift region and the p-type body region so as to avoid a site immediately under a drain region which is in contact with the n-type drift region.
Anmelder
- Firma
- Renesas Electronics Corporation
- Land
- 🇯🇵 Japan
Japanischer Halbleiterhersteller mit Sitz in Tokio, spezialisiert auf Mikrocontroller, analoge Bauelemente und Halbleiterlösungen unter anderem für die Automobil- und Industrieelektronik.
1.103 Patente in unserer Datenbank