Verfahren zur Herstellung eines Hochspannungs-LDMOS-Transistors

Details

Veröffentlichungs-Nr.

EP2665101

Aktenzeichen

EP12167851

Anmeldetag

14. Mai 2012

Veröffentlichung

31. Oktober 2018

Erteilung

31. Oktober 2018

Rechtsraum

EP

IPC

H01L29/78H01L29/08H01L21/336// H01L21/266H01L29/423

Abstract

A first well (2) of a first type of conductivity is formed in a substrate (1). A second well (3) of an opposite type of conductivity is formed in the first well. A source region (4) is formed in the first well outside the second well. A drain region (5) is formed in the second well, leaving a drift region (13) in the second well between the drain region and the source region. A bulk contact region (6) is formed in the first well. A gate dielectric (8) and a gate electrode (9) are arranged on the substrate between the second well and the source region. The doping of the second well is reduced in the drift region by using an implantation mask (10) with a patterned window (11) comprising openings (12) that are confined in directions both along the drift region and transverse to the drift region.

Anmelder

Firmen

ams AG
austriamicrosystems AG

Land

🇦🇹 Österreich

Fachgebiete