Verfahren zur Dickenvariationsmessung in einer Schicht einer Mehrschichtigen Halbleiterstruktur
Anmelder: Soitec 🇫🇷
Details
- Veröffentlichungs-Nr.
- EP3150959
- Aktenzeichen
- EP15306552
- Anmeldetag
- 2. Oktober 2015
- Veröffentlichung
- 26. Dezember 2018
- Erteilung
- 26. Dezember 2018
- Rechtsraum
- EP
- IPC
- G01B11/30G01B11/06H01L21/66
Abstract
The invention relates to a method for measuring thickness variations in a first layer (1) of a multilayer semiconductor structure (S), comprising: - acquiring, with an image acquisition system, an image of at least one zone of the surface of said structure, said image being obtained by reflecting a quasi-monochromatic light flux on said zone of the surface of said structure, - processing said acquired image so as to determine, from intensity variations of the light reflected by said zone of the surface, a map of the thickness variations of said first layer (1), said treatment comprising comparing the intensity of each pixel of the image with a predetermined calibration curve defining a relationship between the intensity of a pixel of the acquired image and a local thickness of the first layer (1), said calibration curve being determined for a given thickness of a second layer (2) of the structure different from the first layer (1), wherein the wavelength of said quasi-monochromatic light flux is selected so as to correspond to a minimum of the sensitivity of the reflectivity with respect to said second layer (2), said method being characterized in that it further comprises: - measuring the thickness of the second layer (2) in said at least one zone of the surface of the structure, - if said measured thickness is different from the thickness of the second layer (2) considered in the calibration curve, applying a correction curve to the map of the thickness variations, wherein said correction curve defines, for said measured thickness of the second layer (2), a relationship between a thickness of the first layer (1) and a correction factor to apply to the map of the thickness variations of the first layer (1), so as to determine a corrected map of thickness variations of the first layer.
Anmelder
- Firma
- Soitec
- Land
- 🇫🇷 Frankreich
Französischer Halbleiterhersteller mit Sitz in Bernin, spezialisiert auf Silicon-on-Insulator (SOI) Substrate. Patente decken Halbleitermaterialien und Waferbondtechnik ab.
529 Patente in unserer Datenbank