Befehlsarbitrierung für Hochgeschwindigkeitsspeicherschnittstellen

Details

Veröffentlichungs-Nr.

EP3270294

Aktenzeichen

EP16200971

Anmeldetag

28. November 2016

Veröffentlichung

26. September 2018

Erteilung

26. September 2018

Rechtsraum

EP

IPC

G06F13/16

Abstract

In one form, a memory controller includes a command queue and an arbiter. The command queue receives and stores memory access requests. The arbiter includes a plurality of sub-arbiters for providing a corresponding plurality of sub-arbitration winners from among the memory access requests during a controller cycle, and for selecting among the plurality of sub-arbitration winners to provide a plurality of memory commands in a corresponding controller cycle. In another form, a data processing system includes a memory accessing agent for providing memory accesses requests, a memory system, and the memory controller coupled to the memory accessing agent and the memory system.

Anmelder

Firma

Advanced Micro Devices, Inc.

Land

🇺🇸 USA

Fachgebiete