Verfahren und Vorrichtung zur Gleichzeitigen Verbindung mehrerer Chips von Unterschiedlicher Höhe auf einem Flexiblen Substrat mittels eines Anisotropen Leitfähigen Films oder einer Anisotropen Leitfähigen Paste

EP3312877 Art A3 8. August 2018

Anmelder: Palo Alto Research Center, Incorporated 🇺🇸

Details

Veröffentlichungs-Nr.
EP3312877
Aktenzeichen
EP17197418
Anmeldetag
19. Oktober 2017
Veröffentlichung
8. August 2018
Rechtsraum
EP
IPC
H01L21/98H01L21/67H01L21/60
Offizieller Volltext

Abstract

A method for substantially simultaneously bonding multiple semiconductor chips (116A, 116B) of different height profiles on a flexible substrate (100) comprises: providing a flexible substrate (100) with printed conductive traces (102); placing an anisotropic conductive adhesive (ACA) (104) over at least portions of the printed conductive traces (102) of the flexible substrate (100), the ACA (104) including a thermosetting adhesive and conductive spherical elements; tacking the ACA (104) in place by application of heat and pressure for a predetermined time; positioning and orientating a first side of each of multiple semiconductor chips (116A, 116B) to align with selected locations of the printed conductive traces (102) of the flexible substrate (100) lying under the ACA (104), wherein at least one of the multiple semiconductor chips (116A, 116B) has a height profile different from at least one other one of the multiple semiconductor chips (116A, 116B); curing the thermosetting adhesive of the ACA (104) by applying heat and pressure, wherein the pressure is applied, with a deformable bonding head (206), an expandable elastic membrane (304) or a plurality of movable pins (402) held in a support structure (e.g., a pin screen) (404), to a second side of each of the multiple semiconductor chips (116A, 116B), the applying of the pressure pressing and deforming the conductive spherical elements of the ACA (104), wherein electrical contact is made between the semiconductor chips (116A, 116B) and at least portions of the printed conductive traces (102). A corresponding semiconductor chip bonding device (200, 300, 400) is also disclosed.

Anmelder

Firma
Palo Alto Research Center, Incorporated
Land
🇺🇸 USA
🇺🇸 Palo Alto Research Center

US-amerikanisches Forschungsinstitut in Palo Alto, bekannt als PARC, das für Xerox und externe Auftraggeber Grundlagen- und angewandte Forschung in Informatik, Elektronik und Materialwissenschaften betreibt.

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