Verfahren zur Herstellung eines Halbleiterelements mit Hochwiderstandsfähigem Substrat
Anmelder: Soitec 🇫🇷
Details
- Veröffentlichungs-Nr.
- EP3319113
- Aktenzeichen
- EP17198392
- Anmeldetag
- 25. Oktober 2017
- Veröffentlichung
- 31. Juli 2019
- Erteilung
- 31. Juli 2019
- Rechtsraum
- EP
- IPC
- H01L21/322H01L21/268H01L21/324// H01L21/762
Abstract
The invention concerns a method of fabrication of a semiconductor element, the method involving a step of rapid heat treatment exposing a substrate comprising a base having a resistivity greater than 1000 Ohm.cm to a peak temperature able to deteriorate the resistivity of the base. According to the invention, the step of rapid heat treatment is followed by a curing heat treatment exposing the substrate to a curing temperature between 800°C and 1250°C and having a cooldown rate less than 5°C/sec when the curing temperature is between 1250°C and 1150°C, less than 20°/sec when the curing temperature is between 1150°C and 1100°C, and less than 50°C/sec when the curing temperature is between 1100°C and 800°C.
Anmelder
- Firma
- Soitec
- Land
- 🇫🇷 Frankreich
Französischer Halbleiterhersteller mit Sitz in Bernin, spezialisiert auf Silicon-on-Insulator (SOI) Substrate. Patente decken Halbleitermaterialien und Waferbondtechnik ab.
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