Verfahren und Systeme zur Datengefahrenabwendung zwischen Pipelines
Anmelder: Imagination Technologies Limited 🇬🇧
Details
- Veröffentlichungs-Nr.
- EP3416049
- Aktenzeichen
- EP18177707
- Anmeldetag
- 14. Juni 2018
- Veröffentlichung
- 8. Februar 2023
- Erteilung
- 8. Februar 2023
- Rechtsraum
- EP
- IPC
- G06F9/38
Abstract
Methods and parallel processing units for avoiding inter-pipeline data hazards wherein inter-pipeline data hazards are identified at compile time. For each identified inter-pipeline data hazard the primary instruction and secondary instruction(s) thereof are identified as such and are linked by a counter which is used to track that inter-pipeline data hazard. Then when a primary instruction is output by the instruction decoder for execution the value of the counter associated therewith is adjusted (e.g. incremented) to indicate that there is hazard related to the primary instruction, and when primary instruction has been resolved by one of multiple parallel processing pipelines the value of the counter associated therewith is adjusted (e.g. decremented) to indicate that the hazard related to the primary instruction has been resolved. When a secondary instruction is output by the decoder for execution, the secondary instruction is stalled in a queue associated with the appropriate instruction pipeline if at least one counter associated with the primary instructions from which it depends indicates that there is a hazard related to the primary instruction.
Anmelder
- Firma
- Imagination Technologies Limited
- Land
- 🇬🇧 Großbritannien
Britisches Halbleiter-Designunternehmen aus Kings Langley, das Grafikprozessor-IP-Kerne (PowerVR) sowie Prozessorarchitekturen für mobile Geräte, Automobil- und eingebettete Systeme entwickelt und lizenziert.
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