Empfängervorrichtung für Gnss (globales Navigationssatellitensystem) mit einem Gnss-Pseudozufallsrauschverzögerten Sequenzgenerator, Entsprechendes Erzeugungsverfahren und Computerprogrammprodukt
Anmelder: STMicroelectronics S.r.l. 🇮🇹
Details
- Veröffentlichungs-Nr.
- EP3614179
- Aktenzeichen
- EP19192231
- Anmeldetag
- 19. August 2019
- Veröffentlichung
- 18. Februar 2026
- Erteilung
- 18. Februar 2026
- Rechtsraum
- EP
- IPC
- G01S19/30G01S19/37H04J13/00H04B1/7085// H04J13/10
Abstract
A GNSS (Global Navigation Satellite System) receiver apparatus, said receiver (100) comprisinga tracking module (5), comprising at least one tracking channel (TRK<sub>i</sub>) comprisinga bank of correlators (25) receving in-phase (I<sub>w</sub>) and quadrature (Qw) versions of a received signal (I<sub>T</sub>; Q<sub>T</sub>),a GNSS Pseudo Random Noise sequence generator (23) generating a Pseudo Random Noise sequence (PS) at a code frequency (Fchip) set by a code Numerical Controlled Oscillator (32) comprised in the tracking channel (TRK<sub>i</sub>) determining a code rate,a GNSS Pseudo Random Noise delayed sequence generator (24; 44) configured to generate, on the basis of a Pseudo Random Noise sequence (PS) received from said GNSS Pseudo Random Noise sequence generator (23), at least one punctual (P), one early (E1, E2; E1...EK) and one delayed (L1, L2; L1...LK) replica of said Pseudo Random Noise sequence (PS),said GNSS Pseudo Random Noise delayed sequence generator (24; 44) comprising at least a first and second delay lines arranged as shift registers (245, 246; 441, 445), comprising a determined number (N) of flip-flops (FF0...FF15, FF16...FF31; FF0...FFN-1, FFN...FF2N-1) arranged in series and identifying taps at their output and said Pseudo Random Noise sequence (PS) being brought as input of the first register (245; 441), taps of said registers (245, 246; 441, 445) being selected as early (E1, E2; E1...EK) and delayed (L1, L2; L1...LK) replicas of said Pseudo Random Noise sequence (PS) on the basis of selection signal issued by a control logic (41) of the receiver (100),The apparatus comprises a circuit arrangement (32, 36, 37; 32, 42, 43, 45) configured to generate an enable signal (EN) fed to an enable input of said flip-flops (FF0...FF15, FF16...FF31; FF0...FFN-1, FFN...FF2N-1), said enable signal (EN) operating at a selectable enable frequency (1/T_en).
Anmelder
- Firma
- STMicroelectronics S.r.l.
- Land
- 🇮🇹 Italien
Italienische Konzerngesellschaft des schweizerisch-französischen Halbleiterherstellers STMicroelectronics. Entwickelt und fertigt Halbleiterkomponenten für Automobil-, Industrie- und Konsumelektronik.
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Buzzi, Notaro & Antonielli d'Oulx wurde 1992 in Turin gegründet und zählt zu Italiens zehn größten IP-Kanzleien, als vollumfängliche, kosteneffiziente Beraterin für nationale wie internationale Mandate vor EPA und EUIPO.
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Buzzi, Notaro & Antonielli d'Oulx S.p.A
Buzzi, Notaro & Antonielli d'Oulx S.p.A · Torino