Back-End-Of-Line(beol)-Integration für Selbstausgerichtete Durchkontaktierungen

Details

Veröffentlichungs-Nr.

EP3913659

Aktenzeichen

EP20212536

Anmeldetag

8. Dezember 2020

Veröffentlichung

9. Juli 2025

Erteilung

9. Juli 2025

Rechtsraum

EP

IPC

H01L21/768H01L23/522H01L23/528

Abstract

Disclosed herein are methods for manufacturing an integrated circuit (IC) structure, e.g., for manufacturing a metallization stack portion of an IC structure, with one or more self-aligned vias integrated in the back end of line (BEOL), and related semiconductor devices. The methods may employ direct metal etch for scaling the BEOL pitches of the metallization layers. In one aspect, an example method results in fabrication of a via that is self-aligned to both a metal line above it and a metal line below it. Methods described herein may provide improvements in terms of one or more of reducing the misalignment between vias and electrically conductive structures connected thereto, reducing the RC delays, and increasing reliability if the final IC structures.

Anmelder

Firmen

Intel NDTM US LLC
Intel Corporation

Land

🇺🇸 USA

Fachgebiete