Halbleiterstruktur und Herstellungsverfahren dafür
Anmelder: Changxin Memory Technologies, Inc. 🇨🇳
Details
- Veröffentlichungs-Nr.
- EP3998631
- Aktenzeichen
- EP21769621
- Anmeldetag
- 15. Juni 2021
- Veröffentlichung
- 24. Januar 2024
- Erteilung
- 24. Januar 2024
- Rechtsraum
- EP
- IPC
- H10B12/00
Abstract
An embodiment of the disclosure provides a semiconductor structure and a manufacturing method thereof. The semiconductor structure includes: a substrate, a bit line structure located on the substrate, a capacitor contact hole located on two opposite sides of the bit line structure, and an isolation sidewall. The isolation sidewall is located between the bit line structure and the capacitor contact hole. A gap is provided between the isolation sidewalls located on the two opposite sides of the bit line structure. The gap is located on the bit line structure. The disclosure facilitates the reduction of the parasitic capacitance of the semiconductor structure.
Anmelder
- Firma
- Changxin Memory Technologies, Inc.
- Land
- 🇨🇳 China
Chinesischer Halbleiterhersteller mit Sitz in Hefei, spezialisiert auf DRAM-Speicherchips.
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