Gate-Treiberschaltung und Leistungswandler

Details

Veröffentlichungs-Nr.

EP4117182

Aktenzeichen

EP22183327

Anmeldetag

6. Juli 2022

Veröffentlichung

18. Dezember 2024

Erteilung

18. Dezember 2024

Rechtsraum

EP

IPC

H03K17/16H03K17/082H03K17/284H02M1/08H03K17/14H02M1/32H02M7/5387

Abstract

A gate drive circuit according to an embodiment includes: a voltage detector that detects a voltage between a first terminal and a second terminal of a switching device; a delay circuit that outputs, with a delay for a predetermined time, a detected value of the voltage obtained from the voltage detector; and a first off-mode drive circuit and a second off-mode drive circuit that apply a control signal to a control terminal of the switching device for turning off the switching device, wherein the first off-mode drive circuit turns off the switching device faster than the second off-mode drive circuit, and stops its operation to turns off the switching device when the delayed voltage value output from the delay circuit exceeds a predetermined threshold value.

Anmelder

Firmen

KABUSHIKI KAISHA TOSHIBA
Toshiba Infrastructure Systems & Solutions Corporation

Land

🇯🇵 Japan

Fachgebiete