Verfahren zum Durchführen von Kriptorischen Vorgängen in einer Verarbeitungsvorrichtung, Entsprechende Verarbeitungsvorrichtung und Computerprogrammprodukt

EP4117221 Art A1 11. Januar 2023

Anmelder: STMicroelectronics S.r.l. 🇮🇹

Details

Veröffentlichungs-Nr.
EP4117221
Aktenzeichen
EP22179876
Anmeldetag
20. Juni 2022
Veröffentlichung
11. Januar 2023
Rechtsraum
EP
IPC
H04L9/00H04L9/06
Offizieller Volltext

Abstract

Method for performing cryptographic operations in a processing device, said cryptographic operations comprising a Leakage Resilient derivation function which derives at least a key (DK) from a master key (MK), said method comprising performing said operation of deriving said at least a key (DK) from a master key (MK) by invoking a plurality of instances of an encryption cipher (11), providing a unique initialization vector (NC), in particular a random number, comprising a plurality of initialization vector bits, in particular 128, invoking a first instance of said cipher (11) providing to said first instance of said cipher (11) a master key (MK) as encryption key and a first set of bits (NCS<0>) in said plurality of initialization vector bits as plaintext input which is encoded by said cipher with said master key (MK) obtaining an intermediate key, performing an iterative procedure comprising at each iteration invoking a further instance of said cipher (11), providing an intermediate key (IK<i-1>) at the encrypted output of an instance of the cipher (11), previous with respect to said further instance, and a set (NCS<i>) of said plurality of initialization vector bits as plaintext input, which is subsequent the set (NCS<i-1>) used by the previous instance of the cipher, said subsequent set (NCS<i>) being encoded by said further instance of the cipher (11) with said previous intermediate key (IK<i-1>) to obtain a subsequent intermediate key (IK<i>), said iteration being performed on all the sets (NCSi) of the plaintext, wherein said providing set (NCS<i>) of said plurality of initialization vector bits as plaintext input includes providing introducing said initialization vector bits in bytes of an input state (S) of the cipher (11), introducing at most one initialization vector bit per byte, a number (nn) of bits introduced in said input state (S) varying from 2 to the number of bytes in the input state of the cipher (11).

Anmelder

Firma
STMicroelectronics S.r.l.
Land
🇮🇹 Italien
🇮🇹 STMicroelectronics Italy

Italienische Konzerngesellschaft des schweizerisch-französischen Halbleiterherstellers STMicroelectronics. Entwickelt und fertigt Halbleiterkomponenten für Automobil-, Industrie- und Konsumelektronik.

2.334 Patente in unserer Datenbank

Kanzlei
Buzzi, Notaro & Antonielli d'Oulx S.p.A Torino, Italien

Buzzi, Notaro & Antonielli d'Oulx wurde 1992 in Turin gegründet und zählt zu Italiens zehn größten IP-Kanzleien, als vollumfängliche, kosteneffiziente Beraterin für nationale wie internationale Mandate vor EPA und EUIPO.

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