System und Verfahren zur Verwaltung von Speicherfehlern in Integrierten Schaltungen

Details

Veröffentlichungs-Nr.

EP4239480

Aktenzeichen

EP23158725

Anmeldetag

27. Februar 2023

Veröffentlichung

2. Oktober 2024

Erteilung

2. Oktober 2024

Rechtsraum

EP

IPC

G06F11/00G06F11/14

Abstract

An integrated circuit (IC) includes a memory that stores a thread and a processor that generates an instruction request to retrieve one or more instructions of the thread. The IC further includes an error control circuit that receives the instruction request from the processor and retrieves an instruction of the thread from the memory based on the instruction request. Further, the error control circuit determines whether the retrieved instruction is erroneous. Based on the determination that the retrieved instruction is erroneous, the error control circuit provides a substitute instruction to the processor as a response to the instruction request. The substitute instruction is included in an instruction set of the processor. The processor executes the received substitute instruction and suspends an execution of the thread.

Anmelder

Firma

NXP B.V.

Land

🇳🇱 Niederlande

Fachgebiete