Dynamische Direktzugriffspeichervorrichtung und Verfahren

Details

Veröffentlichungs-Nr.

EP4343765

Aktenzeichen

EP22197499

Anmeldetag

23. September 2022

Veröffentlichung

27. März 2024

Rechtsraum

EP

IPC

G11C11/404H10B12/00// G11C5/06G11C7/18G11C8/14

Abstract

A memory device (100) for a DRAM is provided, comprising a first semiconductor device layer (10) comprising a first DRAM bit cell (110) and a second semiconductor device layer (20) comprising a second DRAM bit cell (120). Further, at least one of a first and second interconnecting structure (130, 140) is provided, the first interconnecting structure (130) extending vertically between the first and second semiconductor device layer and being arranged to form a write word line (WWL) common to the gate terminal (113, 123) of the write transistors of the first and second bit cells, and the second interconnecting structure (140) extending vertically between the first and second semiconductor device layer and being arranged to form a read word line (RWL) common to a first source/drain terminal (117, 127) of the read transistors of the first and second bit cells.

Anmelder

Firma

IMEC VZW

Land

🇧🇪 Belgien

Fachgebiete