Passive Taktsynchronisation für Taktung

Details

Veröffentlichungs-Nr.

EP4513294

Aktenzeichen

EP24195745

Anmeldetag

21. August 2024

Veröffentlichung

26. Februar 2025

Rechtsraum

EP

IPC

G06F1/12G06F1/14H04J3/06

Abstract

The present disclosure provides for an architecture for a multi-interface card environment, such as a server that includes multiple network interface cards (NICs) or peripheral component interconnect express (PCIe) cards. The architecture includes a passive optical splitter coupled between a leader clock and the multiple interface cards or PCIes. The optical splitter can be used to distribute clock time from the leader clock to the interface cards. The architecture provides for distribution of timing in a scalable manner in the multi-NIC environments for cloud deployments.

Anmelder

Firma

Google LLC

Land

🇺🇸 USA

Fachgebiete