Datenverfälschungsverfolgung für Speicherzuverlässigkeit

Details

Veröffentlichungs-Nr.

EP4711920

Anmeldetag

12. Januar 2023

Veröffentlichung

18. März 2026

Rechtsraum

EP

IPC

G06F11/10, G06F13/16, G06F9/30G06F9/30

Abstract

Techniques are disclosed relating to improving memory reliability, e.g., in the context of memory circuits with limited reliability features. In some embodiments, memory controller circuitry is configured to communicate with memory circuitry via an interface that supports link error detection. The memory controller circuitry may, based on a corruption indicator, transmit a data and parity combination for the first data block that causes the memory circuitry to detect an uncorrectable write interface error. Subsequent reads of the location may therefore cause an uncorrectable error indication. This may advantageously allow the memory controller circuitry to propagate a corruption indicator as an uncorrectable error in the memory circuit, without requiring additional tracking of the indicator by the memory circuit or memory controller, in some embodiments.

Anmelder

Firma

Apple Inc.

Land

🇺🇸 USA