Datenübertragung über eine Verbindung zwischen Chips eines Dreidimensionalen Chipstapels

Details

Veröffentlichungs-Nr.

EP4718722

Anmeldetag

28. August 2025

Veröffentlichung

1. April 2026

Rechtsraum

EP

Abstract

An example integrated circuit (100) disclosed herein includes a first die (105) including first microbumps (135) associated with a source-synchronous data interface of a three-dimensional, 3D, die stack, a first one of the first microbumps in circuit with a clock output (125) of the first die, a second one of the first microbumps in circuit with a data output (130) of the first die, the clock output and the data output associated with a transmitter side of the source-synchronous data interface. The example integrated circuit also includes a second die (110) including second microbumps (150) associated with the source-synchronous data interface of the 3D die stack, a first one of the second microbumps in circuit with a clock input of the second die, a second one of the second microbumps in circuit with a data input of the second die, the clock input and the data input associated with a receiver side of the source-synchronous data interface.

Anmelder

Firma

INTEL Corporation

Land

🇺🇸 USA