Referenztaktgeneratorschaltung

Details

Veröffentlichungs-Nr.

EP4730653

Anmeldetag

6. Oktober 2025

Veröffentlichung

22. April 2026

Rechtsraum

EP

IPC

H03L7/00, H03L7/181, G06F1/12(TORIMOTO HIDEYUKI et al.)

Abstract

Disclosed is a technology related to semiconductor circuits, and particularly, to circuits for generating a reference clock from a radio signal. A window in which an external signal, which is input to control a frequency according to a difference between an output of a digitally controlled oscillating circuit and a target frequency is considered in terms of circuits, is dynamically controlled. A reference clock generating circuit can vary a frequency of an output reference clock by selecting a target count value of a frequency counter as one of a plurality of sets according to an operating mode. The reference clock generating circuit can be controlled to block power from being supplied to the circuit when the output is stably locked to the target frequency, and the digitally controlled oscillating circuit is allowed to be controlled to perform free running by a last input oscillation control word.

Anmelder

Firmen

SKAIChips Co., Ltd.
Research & Business Foundation Sungkyunkwan University

Land

🇰🇷 Südkorea

Fachgebiete