Widerstand mit Aktiver Abschirmung in einer Halbleitervorrichtung

Details

Veröffentlichungs-Nr.

EP4730947

Anmeldetag

1. Oktober 2025

Veröffentlichung

22. April 2026

Rechtsraum

EP

IPC

H10D1/00, H10D1/47, H10D84/00

Abstract

An example integrated circuit (IC) includes a semiconductor substrate having a first well and a second well; a first resistor disposed on the semiconductor substrate over the first well within a boundary thereof; a second resistor disposed on the semiconductor substrate over the second well within a boundary thereof, the boundary of the second well disjoint from the boundary of the first well; and a first contact to bias the semiconductor substrate at a first voltage, a second contact to bias the first well at a second voltage, and a third contact to bias the second well at a third voltage.

Anmelder

Firma

Avago Technologies International Sales Pte. Limited

Land

🇸🇬 Singapur