Verarbeitungssystem, Zugehörige Integrierte Schaltung, Vorrichtung und Verfahren

Details

Veröffentlichungs-Nr.

EP4742068

Anmeldetag

22. Oktober 2025

Veröffentlichung

13. Mai 2026

Rechtsraum

EP

IPC

(PICK DANIEL et al.)(BERENBAUM ALAN et al.)(COLOMBO ROBERTO et al.)

Abstract

A processing system (10a) is described. The processing system comprises a non-volatile memory (104a) comprising a first memory slot arranged to store a first master password (MPW0), a second memory slot arranged to store a second master password (MPW1) and a third memory slot arranged to store a security password (SPW0). A password verification circuit (152a) is configured to set an overwrite signal (OW; OWM) to indicate a success verification of the first master password (MPW0) or a success verification of said second master password (MPW1). Specifically, a protection circuit (150a) is configured to manage write access to the third memory slot arranged to store a security password (SPWO). For this purpose, the protection circuit receives a write request (CMD) for writing a new security password to the third memory slot. Moreover, the protection circuit determines whether security access data (SIi, SPW_CTR) indicate that the third memory slot is associated with the first master password (MPW0) or with the second master password (MPW1), and determines whether the overwrite signal (OW; OWM) indicates a success verification of the first master password (MPW0) or the second master password (MPW1). Accordingly, the protection circuit may selectively enable or disable the writing of the new security password to the third memory slot based on whether the security access data (SIi, SPW_CTR) indicate that the third memory slot is associated with the first master password (MPW0) or with the second master password (MPW1), and the value of the overwrite signal (OW; OWM).

Anmelder

Firma

STMicroelectronics International N.V.

Land

🇨🇭 Schweiz