Fehlererkennungseinheit zur Prüfung von Konfigurationsregistern und Fehlererkennungsverfahren dafür
Anmelder: STMicroelectronics International N.V. 🇨🇭
Details
- Veröffentlichungs-Nr.
- EP4756623
- Anmeldetag
- 24. November 2025
- Veröffentlichung
- 10. Juni 2026
- Rechtsraum
- EP
- IPC
- G06F11/10
Abstract
A fault detection circuit (10) for checking configuration registers (REG<sub>1</sub>...REG<sub>N</sub>) of a processing unit, performing a configuration register test on a given set of registers (REG<sub>1</sub>...REG<sub>N</sub>) of said processing unit, reading settings of the configuration registers (REG<sub>1</sub>...REG<sub>N</sub>) and comparing them with expected settings,wherein said fault detection circuit (10) comprisesa set of parity calculator units (PAR_CALC<sub>1</sub>...PAR_CALC<sub>N</sub>), each parity calculator unit (PAR_CALC<sub>X</sub>) configured to receive from at least a configuration register (REG<sub>X</sub>) in said given set of registers (REG<sub>1</sub>...REG<sub>N</sub>) at least a subset of bits (SB<sub>X</sub>) of a set of bits stored in said at least configuration register (REG<sub>X</sub>) and configured to calculate a parity code (P<sub>X</sub>) of said subset of bits (SB<sub>X</sub>) which binary value indicates a parity of said subset of bits (SB<sub>X</sub>),a set of capture units (CAPT<sub>1</sub>...CAPT<sub>N</sub>) each configured to receive a parity code (P<sub>X</sub>) output from a respective parity calculator unit (PAR_CALC<sub>X</sub>) in said set of parity calculator units (PAR_CALC<sub>1</sub>...PAR_CALC<sub>N</sub>) and to hold it on its output as captured parity code (PC<sub>X</sub>) under the control of a capture control signal (TRIG_CAPT).a controller module (RCC) configured to, for each parity calculation unit (PAR_CALC<sub>X</sub>) and respective capture unit (CAPT<sub>X</sub>),issue a parity calculation control signal (TRIG_CALC) enabling the calculation of the parity code (P<sub>X</sub>) by the corresponding parity calculation unit (PAR_CALC_X) at a given time,issue said capture control signal (TRIG_CAPT) to enable holding of the parity code value (P<sub>X</sub>) as captured parity code (PC<sub>X</sub>) ,receive said captured parity code (PC<sub>X</sub>) and compare it with a captured parity code (PC<sub>X</sub>) received at a previous time andsignal (ERR) a fault if the comparison indicates a change in the value of the captured parity code (PC<sub>X</sub>), storing an index (X) identifying the register (REG<sub>X</sub>) which comparison indicates a change in the value of the captured parity code (PC<sub>X</sub>).
Anmelder
- Firma
- STMicroelectronics International N.V.
- Land
- 🇨🇭 Schweiz
Schweizer Gesellschaft des Halbleiterkonzerns STMicroelectronics, die Chips und Sensoren für Automobiltechnik, Industrie und Unterhaltungselektronik entwickelt.
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