Verfahren und Schaltung zum Bitlesen Während eines Einschalt-Rücksetzens eines Nichtflüchtigen Speichers

Details

Veröffentlichungs-Nr.

EP4756812

Anmeldetag

24. Juni 2025

Veröffentlichung

10. Juni 2026

Rechtsraum

EP

Abstract

Embodiments of the present disclosure provide a memory circuit, including: a non-volatile memory; a one-time-programmable memory; a sense amplifier coupled to the non-volatile memory and the one-time-programmable memory; a digital register coupled to an output of the sense amplifier for storing reference resistance bits; control logic coupled to an output of the digital register; a decoder coupled to an output of the control logic; and a controller for outputting a control signal to the control logic to select a first reference resistance for the sense amplifier from the decoder for a reading of bits from the one-time-programmable memory, and to select a second reference resistance for the sense amplifier from the decoder for a reading of bits from the non-volatile memory.

Anmelder

Firma

GlobalFoundries U.S. Inc.

Land

🇺🇸 USA