Ausgleicher für Zellen von Elektrischen Doppelschichten-Kondensatoren

Details

Veröffentlichungs-Nr.

EP4757116

Anmeldetag

4. Dezember 2025

Veröffentlichung

10. Juni 2026

Rechtsraum

EP

IPC

H02J7/54, H02J7/34, H02J7/96

Abstract

Disclosed is a balancer (100) for electric double-layer capacitors (C1, C2) that improves charging energy efficiency by allowing deviation within a permissible range in which charging voltages of a first electric double-layer capacitor (C1) and a second electric double-layer capacitor (C2) do not cause problems, while controlling currents (IL1, IL2) flowing through the two electric double-layer capacitors to be equal. The balancer (100) includes a first resistor (R1), a second resistor (R2), and a third resistor (R3) sequentially connected in series between a power line (VCC) and a common line (COMMON); a first transistor (Q1) having a base terminal (B) electrically connected between the first resistor (R1) and the second resistor (R2) and connected across the first electric double-layer capacitor (C1); and a second transistor (Q2) connected in series with the first transistor (Q1), having a base terminal (B) electrically connected between the second resistor (R2) and the third resistor (R3) and connected across the second electric double-layer capacitor (C2).

Anmelder

Firma

Korchip Corporation

Land

🇰🇷 Südkorea

Fachgebiete