Spannungsregler

Details

Veröffentlichungs-Nr.

EP4769056

Anmeldetag

29. Oktober 2025

Veröffentlichung

1. Juli 2026

Rechtsraum

EP

IPC

G05F1/46, H02M3/07

Abstract

An apparatus comprises a push-pull regulation loop (PPRL), an input terminal, an output terminal, and a plurality of FC circuits. The PPRL comprises a PMOS transistor, an NMOS transistor, and a first plurality of capacitors. The input terminal and the output terminal are coupled to the PPRL via the first plurality of capacitors. The plurality of FC circuits includes a second plurality of capacitors. FC circuits of the plurality of FC circuits are coupled to each other and a rail between the input terminal and the output terminal. An FC circuit of the plurality of FC circuits comprises at least a first transistor switch and a second transistor switch coupled to a corresponding capacitor of the second plurality of capacitors.

Anmelder

Firma

INTEL Corporation

Land

🇺🇸 USA

Fachgebiete