Netzwerk auf Chip

Details

Veröffentlichungs-Nr.

EP4776147

Anmeldetag

17. Dezember 2025

Veröffentlichung

15. Juli 2026

Rechtsraum

EP

IPC

G06F15/78

Abstract

A network on chip comprising: a first quadrant, a second quadrant, a third quadrant, and a fourth quadrant; each quadrant comprising a first cluster and a second cluster; and wherein the first cluster of the first quadrant is directly connected to four clusters comprising: the second cluster of the first quadrant, the second cluster of the second quadrant, the first cluster of the fourth quadrant, and the second cluster of the fourth quadrant. The network on chip architecture optimizes connectivity, fault tolerance, and data transmission efficiency by ensuring each cluster is directly connected to four other clusters. This reduces latency, enhances scalability, and improves load balancing. The modular design simplifies integration and expansion, making it suitable for high-performance, reliable, and efficient multi-core systems. This architecture balances wiring complexity, latency, and power consumption, offering significant advantages over traditional topologies.

Anmelder

Firma

Numascale AS

Land

🇳🇴 Norwegen

Fachgebiete