Hardwarebeschleuniger für Allgemeine Matrixoperationen auf der Basis von Nachschlagtabellen

Details

Veröffentlichungs-Nr.

EP4787199

Anmeldetag

23. Mai 2025

Veröffentlichung

5. August 2026

Rechtsraum

EP

Abstract

A hardware accelerator for general matrix operations based on lookup tables, the accelerator including a weight buffer for storing at least a portion of a weight matrix containing a quantum weight of an integer where a weight of a target model is quantized, an input buffer for storing at least a portion of an input matrix containing input activation values based on a floating point number with respect to the target model, and a matrix processing unit (MPU) for performing a matrix operation between the weight matrix and the input matrix through communication with the weight buffer and the input buffer. The matrix processing unit includes a lookup table generator for obtaining each operation result value and for generating a lookup table containing the operation result value and a plurality of processing elements (PE) for generating a partial sum by extracting the operation result value.

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Firmen

NAVER Cloud Corp.
POSTECH Research and Business Development Foundation

Land

🇰🇷 Südkorea