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EP4797068 11. Juni 2026

Anmelder: VeriSilicon Microelectronics (Shanghai) Co., Ltd., VeriSilicon Microelectronics (Chengdu) Co., Ltd. 🇨🇳

Details

Veröffentlichungs-Nr.
EP4797068
Anmeldetag
5. Dezember 2024
Veröffentlichung
11. Juni 2026
Rechtsraum
EP
IPC
G06F3/14
Offizieller Volltext

Abstract

The present invention provides an input-output matching-based display method, circuit, and device and a storage medium. The input-output matching-based display method includes: acquiring an input display timing standard stream and an output display timing standard stream; determining whether the input display timing standard stream and the output display timing standard stream are matched; and adjusting, if the input display timing standard stream and the output display timing standard stream are not matched, porch of the output display timing standard stream, so as to enable time of pixel output controlled by the output display timing standard stream to be matched with time of pixel input controlled by the input display timing standard stream, where the porch includes at least one of vertical back porch, vertical back porch, horizontal front porch, and horizontal back porch. This method can improve image output and display quality.

Anmelder

Firmen
VeriSilicon Microelectronics (Shanghai) Co., Ltd.
VeriSilicon Microelectronics (Chengdu) Co., Ltd.
Land
🇨🇳 China

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