Fskd-Ditheringkompensationsschaltung mit Hoher Bitrate
Anmelder: STMicroelectronics International N.V. 🇨🇭
Details
- Veröffentlichungs-Nr.
- EP4797634
- Anmeldetag
- 16. Februar 2026
- Veröffentlichung
- 26. August 2026
- Rechtsraum
- EP
- IPC
- H04L27/14, H04L27/148
Abstract
According to an embodiment, a wireless power receiving device (120) includes a demodulator (212) that generates carrier cycle data (SYS_CNT) from a received frequency-shift keying modulated signal (FSK<sub>IN</sub>) with dithering. A highpass filtering circuit (404) extracts offset values from the carrier cycle data. A polyphase filtering circuit (406) includes multiple smoothing filters (704) and distributes the extracted offset values among these filters based on a dithering pattern length. A compensation circuit (408) stores smoothed offset values from the polyphase filtering circuit (406) in a dithering table (802) during an evaluation window and applies these stored values to compensate carrier cycle data during subsequent demodulation.
Anmelder
- Firma
- STMicroelectronics International N.V.
- Land
- 🇨🇭 Schweiz
Schweizer Gesellschaft des Halbleiterkonzerns STMicroelectronics, die Chips und Sensoren für Automobiltechnik, Industrie und Unterhaltungselektronik entwickelt.
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