Systeme und Verfahren zur Gleichtaktunterdrückung in Signalverarbeitungssystemen

Details

Veröffentlichungs-Nr.

EP4800925

Anmeldetag

2. Februar 2026

Veröffentlichung

2. September 2026

Rechtsraum

EP

IPC

H03M1/10, // H03M1/16

Abstract

The subject technology is directed to signal processing systems and methods. In an embodiment, the subject technology provides an apparatus that includes a first input terminal and a second input terminal configured to receive respective input signals. A first converter and a second converter generate corresponding output signals based on the input signals. A first circuit, coupled to both converters, determines a gain mismatch between them based on their output signals and adjusts at least one of the signals to compensate for the mismatch. By compensating for gain mismatch in the digital domain, the apparatus improves the common-mode rejection ratio (CMRR) and enhances the accuracy and reliability of analog-to-digital conversion. There are other embodiments as well.

Anmelder

Firma

Avago Technologies International Sales Pte. Limited

Land

🇸🇬 Singapur

Fachgebiete