Konfiguration von Integrierten Schaltungssystemen
Anmelder: Arm Ltd 🇬🇧
Details
- Veröffentlichungs-Nr.
- EP4814724
- Anmeldetag
- 26. März 2025
- Veröffentlichung
- 30. September 2026
- Rechtsraum
- EP
- IPC
- G06F11/14
Abstract
A method of configuring an integrated-circuit system is disclosed, wherein the integrated-circuit system comprises a plurality of nodes of a network, the plurality of nodes comprising one or more processing nodes and a plurality of caching nodes. First-assignment data (301) is accessed that assigns each of the plurality of nodes to a respective local cache region of a plurality of local cache regions. Defect data is accessed that identifies one or more of the nodes as being defective. For a first node of the plurality of nodes that is identified as being defective by the defect data: a first local cache region is identified, to which the first node is assigned by the first assignment data; a distance metric is used to identify (304) a second node, not identified as being defective by the defect data, that is a closest node, out of a subset of the plurality of nodes, for the first local cache region, under the distance metric; and second assignment data is generated (305) in which the second node is assigned to the first local cache region.
Anmelder
- Firma
- Arm Ltd
- Land
- 🇬🇧 Großbritannien
Britisches Unternehmen mit Sitz in Cambridge, das Prozessorarchitekturen und Halbleiter-IP entwickelt und lizenziert.
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