Transistorvorrichtung mit einem Drain-Erweiterungsbereich

Details

Veröffentlichungs-Nr.

EP4819792

Anmeldetag

3. April 2025

Veröffentlichung

7. Oktober 2026

Rechtsraum

EP

IPC

H10D30/60, H10D64/00

Abstract

A transistor device for high voltage and cryogenic applications. The transistor device comprises a drain extension region extending from a drain region towards a source region. The drain extension region is separated from the source region by a body region which is gated by a first gate electrode. The drain extension region increases the separation of the drain region with respect to the source region and the first gate electrode, reducing a risk of source-drain or gate-drain breakdown. A second gate electrode, different to the first gate electrode, is positioned over the drain extension region. A distance between the second gate electrode and the drain region, along a surface of the drain extension region, is no greater than 400 nm. The second gate electrode controls the conductivity of the drain extension region using an applied voltage, enabling the drain extension region to conduct at cryogenic temperatures.

Anmelder

Firma

Infineon Technologies Austria AG

Land

🇦🇹 Österreich

Fachgebiete