Verfahren zur Herstellung einer Floating-Gate-Halbleiterspeichervorrichtung
Anmelder: IMEC VZW, Imec VZW 🇧🇪
Details
- Veröffentlichungs-Nr.
- EP2495762
- Aktenzeichen
- EP11075160
- Anmeldetag
- 6. Juli 2011
- Veröffentlichung
- 1. November 2017
- Erteilung
- 1. November 2017
- Rechtsraum
- EP
- IPC
- H01L29/66H01L29/423
Abstract
The present invention is related to a method for producing a floating gate memory device, wherein a semiconductor-on-insulator substrate (1000) is provided, formed of a base substrate (100), a buried insulation layer (101) and a monocrystalline semiconductor top layer (102). Trenches (121-123) are made in the substrate, to form elevated fin-shaped structures (111-114) having a monocrystalline top portion (102') that will act as the floating gate. Parts of the buried insulation layer (101) will act as the tunnel oxide layer (101') of the floating gate devices. A gate dielectric layer (160) is formed on the side walls of the monocrystalline top portions by thermal oxidation, allowing low thickness of said gate dielectric layer. The invention is equally related to a device obtainable by the method of the invention.
Anmelder
- Firmen
- IMEC VZW
Imec VZW - Land
- 🇧🇪 Belgien
Imec ist ein belgisches Forschungszentrum mit Sitz in Leuven, das auf Nanoelektronik, Halbleitertechnologie und digitale Technologien spezialisiert ist.
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