Halbleitervorrichtung mit hoher Durchbruchspannung und mit isoliertem in einem Graben geformten Gate sowie Herstellungsverfahren dafür

Details

Veröffentlichungs-Nr.

EP2541608

Aktenzeichen

EP12174509

Anmeldetag

29. Juni 2012

Veröffentlichung

21. Dezember 2016

Erteilung

21. Dezember 2016

Rechtsraum

EP

IPC

H01L29/78H01L21/336H01L29/40

Abstract

A semiconductor device, including: a semiconductor body (2); a trench (22) having side walls (22a, 22b) and a bottom; a gate region (14) made of conductive material, extending within the trench; an insulating region (60), extending along bottom portions of the side walls of the trench and on the bottom of the trench; a gate insulating layer (52), extending along top portions of the side walls of the trench, laterally with respect to the gate region; a conductive region (24), extending within the trench, surrounded at the top and laterally by the gate region and surrounded at the bottom and laterally by the insulating region; and a field insulating layer (54), arranged between the gate region and the conductive region. The gate insulating layer is radiused to the insulating region by means of gate-radiusing thickened portions (70a, 70b), each of which has a thickness that increases as the depth increases. The field insulating layer is radiused to the insulating region by means of field-radiusing thickened portions (72a, 72b), each of which has a thickness that increases as the depth increases.

Anmelder

Firma

STMicroelectronics S.r.l.

Land

🇮🇹 Italien

Fachgebiete