Arithmetische Verarbeitungsvorrichtung, Informationsverarbeitungsvorrichtung, Steuerverfahren für die Informationsverarbeitungsvorrichtung und Steuerprogramm für die Informationsverarbeitungsvorrichtung

Details

Veröffentlichungs-Nr.

EP2851804

Aktenzeichen

EP14181728

Anmeldetag

21. August 2014

Veröffentlichung

7. August 2019

Erteilung

7. August 2019

Rechtsraum

EP

IPC

G06F12/1027G06F12/14G06F9/30

Abstract

An arithmetic processing device having an allocation unit configured to reserve a memory allocation area in a memory and register address range information indicating an address range of the memory allocation area in an address range table, in response to an execution of a memory area allocation function requesting memory area allocation, and a determination unit configured to refer to the address range table and perform determination processing as to whether or not an access destination address of a memory access instruction is within an address range indicated by the address range information registered in the address range table, in response to an execution of the memory access instruction relating to the memory allocation area.

Anmelder

Firma

FUJITSU LIMITED

Land

🇯🇵 Japan

Fachgebiete