Verriegelungsschaltung

Details

Veröffentlichungs-Nr.

EP2869467

Aktenzeichen

EP13191288

Anmeldetag

1. November 2013

Veröffentlichung

5. August 2020

Erteilung

5. August 2020

Rechtsraum

EP

IPC

H03K3/037H03K3/356

Abstract

A latch circuit is based on a master-slave cross-coupled inverter pair (40) configuration. The inverters (0, 62) of the slave circuit (42) are coupled to a high voltage rail and a low voltage rail, wherein for each of the two inverters of the slave circuit inverter pair, the coupling to one of the voltage rails is through a resistive element (64, 66). This circuit design avoids the need for an internal clock-buffer and enables single phase clocking (CK), and therefore does not need internal clock signal inversion. The circuit can be implemented with low power, with no dynamic power consumption for redundant transitions when the input (DIN) and the output data signal (DOUT) is same.

Anmelder

Firma

NXP B.V.

Land

🇳🇱 Niederlande

Fachgebiete