Verfahren zur Herstellung einer Transistorvorrichtung und zugehörige Vorrichtung

Details

Veröffentlichungs-Nr.

EP2887399

Aktenzeichen

EP14151285

Anmeldetag

15. Januar 2014

Veröffentlichung

30. August 2017

Erteilung

30. August 2017

Rechtsraum

EP

IPC

H01L29/66H01L29/78H01L29/423H01L29/786H01L29/06

Abstract

A method for manufacturing a transistor device, the method comprising a. providing a plurality of parallel nanowires on a substrate; b. providing a dummy gate structure over a central portion of the parallel nanowires; c. epitaxially growing extension portions of a second material, selectively on the parallel nanowires, outside a central portion; d. providing a filler layer around and on top of the dummy gate structure and the extension portions; e. removing the dummy gate structure, in order to create a gate trench, exposing the central portion of the parallel nanowires; f. providing spacer structures on the sidewalls of the gate trench, to define a final gate trench; g. thinning the parallel nanowires, thereby creating free space in between the nanowires and the spacer structures; h. selectively growing a quantum well layer on or around the parallel nanowires, at least partially filling the free space, to thereby provide a connection between the quantum well layer and the respective extension portions.

Anmelder

Firmen

IMEC VZW
IMEC

Land

🇧🇪 Belgien

Fachgebiete