Teilweise Vorgespannte Isolation in Halbleiterbauelementen
Anmelder: NXP USA, Inc. 🇺🇸
Details
- Veröffentlichungs-Nr.
- EP3142150
- Aktenzeichen
- EP16187929
- Anmeldetag
- 8. September 2016
- Veröffentlichung
- 12. Februar 2020
- Erteilung
- 12. Februar 2020
- Rechtsraum
- EP
- IPC
- H01L29/40H01L21/761H01L29/78H01L29/06H01L29/10
Abstract
A device includes a semiconductor substrate, a doped isolation barrier disposed in the semiconductor substrate and defining a core device area within the doped isolation barrier, an isolation contact region disposed in the semiconductor substrate outside of the core device area and to which a voltage is applied during operation, and a depleted well region disposed in the semiconductor substrate outside of the core device area. The depleted well region electrically couples the isolation contact region and the doped isolation barrier such that the doped isolation barrier is biased at a voltage level lower than the voltage applied to the isolation contact region.
Anmelder
- Firma
- NXP USA, Inc.
- Land
- 🇺🇸 USA
US-amerikanische Gesellschaft des Halbleiterkonzerns NXP, die Chips und Halbleiterlösungen für Automobiltechnik, Kommunikation und Industrieelektronik entwickelt.
1.545 Patente in unserer Datenbank
Fachgebiete
-
Freescale law department - EMEA patent ops
Freescale law department - EMEA patent ops · Toulouse