Substrat für Integrierte Schaltungen und Verfahren zur Herstellung

Details

Veröffentlichungs-Nr.

EP3462483

Aktenzeichen

EP18191349

Anmeldetag

28. August 2018

Veröffentlichung

25. Dezember 2024

Erteilung

25. Dezember 2024

Rechtsraum

EP

IPC

H01L23/498H01L21/48

Abstract

According to various embodiments of the present disclosure, a substrate for an integrated circuit includes a dielectric layer. The substrate further includes a conductive layer extending in an x or y direction. The conductive layer is at least partially embedded within the dielectric layer. The conductive layer includes a via having a first end and an opposite second end. The via has a first height in a z-direction and a constant cross-sectional shape between the first end and the second end. A trace is adjacent to the via and has a second height in the z-direction that is different than the first height.

Anmelder

Firmen

Intel Corporation
INTEL Corporation

Land

🇺🇸 USA

Fachgebiete