2SPL Patentanwälte PartG mbB

Disclosed herein is an integrated circuit (IC) substrate having PTH partial via pads, as well as related assemblies, structures, and methods. In some embodiments, an IC substrate may include a first surface and an opposing second surface; a through hole extending from the first surface to the second surface and having a first sidewall portion and an opposing second sidewall portion; a first conductive material, extending between the first and second surfaces, on the first sidewall portion; a second conductive material, extending between the first and second surfaces, on the second sidewall portion; a third conductive material, at the first surface, coupled to the first conductive material and extending outwards; and a fourth conductive material, at the first surface, coupled to the second conductive material and extending outwards, wherein the first and the third conductive materials are physically separated from the second and the fourth conductive materials.

Microelectronic assemblies, related devices and methods, are disclosed herein. In some embodiments, a microelectronic assembly may include a first microelectronic component having a first bonding layer with a first air gap fiducial; and a second microelectronic component having a second bonding layer with a second air gap fiducial, wherein the first microelectronic component is coupled to the second microelectronic component by the first and second bonding layers, and wherein the first air gap fiducial and the second air gap fiducial are aligned.

Provided is a method for detecting presence of coherent light using a photonic processor. The method includes receiving data indicating, for an output of the photonic processor, a characteristic of the coherent light, the coherent light entering the photonic processor at at least two inputs. The method further includes generating a control signal for adjusting at least one parameter relating to the photonic processor such that the coherent light of the at least two inputs interferes in a way to increase the characteristic at the output. The method further includes determining the presence of the coherent light based on an analysis of the increased characteristic at the output.

Technologies for thermal management of the base die in high-bandwidth memory (HBM) die stacks are disclosed. In an illustrative embodiment, the interface logic region of the base die is a hot spot, as all of the high-speed signals into and out of the HBM die stack pass through the interface logic region. The memory dies stacked above the base die may not extend all the way across the HBM die stack, leaving space above the interface logic region of the base die. A stack of one or more heat transfer layers can be deposited on the base die above the interface logic region, removing heat and conducting it up to the top of the HBM die stack, where a heat sink or integrated heat spreader may be. The stack of one or more heat transfer layers may be any suitable material, such as silicon, dielectric packaging mold, etc.

A wiring system (150) for a platform mountable lifting device comprises a first connector box (200) comprising multiple periphery connectors (202a-p) to attach components relating to the lifting device; a second connector box (300) comprising multiple periphery connectors (302a-o) to attach components relating to the platform and an interconnect (400) between the first connector box (200) and the second connector box (300).

Accordingly, substrates for multi-die IC packages, and related assemblies, devices and methods, are disclosed herein. For example, in some embodiments, a substrate may include a dielectric material having a first surface and an opposing second surface, wherein the first surface includes a protruding portion; a conductive contact on the protruding portion of the first surface of the dielectric material; and a conductive pathway through the dielectric material and coupled to the conductive pathway. In some embodiments, the protruding portion of the first surface of the dielectric material has a thickness between 3 microns and 10 microns.

Disclosed herein are integrated circuit (IC) structures with nanoribbon transistors and C-clamp source and/or drain (S/D) contacts, and related methods and devices. In one aspect, an example IC structure may include a transistor having a channel portion in a nanoribbon, and a conductive contact to a region of the transistor, where the region is one of a source region or a drain region of the transistor and where, in a cross-sectional side view of the IC structure, the conductive contact has a C-shape.

Disclosed herein is a fabrication method that allows forming backside source and/or drain (S/D) contacts that are self-aligned to corresponding S/D regions of a transistor, and related integrated circuit (IC) structures and devices. In one aspect, a resulting IC structure may include a transistor and a nanoribbon comprising a semiconductor material. A channel portion of the transistor includes a portion of the semiconductor material of the nanoribbon and has a front side and a back side. A first conductive contact is at the front side of the channel portion and is in conductive contact with a first S/D region of the transistor. A second conductive contact is at the back side of the channel portion and is in conductive contact with a second S/D region of the transistor. Furthermore, the second conductive contact is self-aligned to the second S/D region of the transistor.

Provided is a radio frequency, RF, switch device. The RF switch device includes a plurality of transistors arranged in series and a RF switch terminal configured to receive a control voltage for controlling a switch state of the RF switch. The RF switch device further includes decoupling circuitry configured to receive a reference voltage. The decoupling circuitry is configured to block a current path from the RF switch terminal to the decoupling circuitry in response to a voltage at the RF switch and the reference voltage satisfying a predetermined criterion.

Provided are methods, computer programs, and apparatuses for providing firewall services in a mobile communication system. The method (10) for providing firewall services in a mobile communication system comprises storing (11) user plane information about a user plane data flow of a data service in the mobile communication system and providing (12) the information about the user plane data flow to a firewall entity to enable firewall services to be applied to the user plane of the mobile communication system.