Hochfrequenzschaltkreis mit Reduzierter Schaltzeit

Details

Veröffentlichungs-Nr.

EP3484049

Aktenzeichen

EP18196804

Anmeldetag

26. September 2018

Veröffentlichung

11. August 2021

Erteilung

11. August 2021

Rechtsraum

EP

IPC

H03K17/0412H03K17/693

Abstract

RF switching circuitry includes a plurality of FETs coupled between an input node, an output node, and a gate drive node. When a positive power supply voltage is provided at the gate drive node, the plurality of FETs turn on and provide a low impedance path between the input node and the output node. When a negative power supply voltage is provided at the gate drive node, the plurality of FETs turn off and provide a high impedance path between the input node and the output node. Switch acceleration circuitry in the RF switching circuitry includes a bypass FET and multi-level driver circuitry. The bypass FET selectively bypasses the common resistor in response to a multi-level drive signal. The multi-level driver circuitry uses a built-in gate to capacitance of the bypass FET to provide the multi-level drive signal at an overvoltage that is above the positive power supply voltage.

Anmelder

Firma

Qorvo US, Inc.

Land

🇺🇸 USA

Fachgebiete