Reihenfolge in Tessellierungsoperationen
Anmelder: Imagination Technologies Limited 🇬🇧
Details
- Veröffentlichungs-Nr.
- EP3550523
- Aktenzeichen
- EP19167188
- Anmeldetag
- 3. April 2019
- Veröffentlichung
- 24. Januar 2024
- Erteilung
- 24. Januar 2024
- Rechtsraum
- EP
- IPC
- G06T17/20
Abstract
Described herein is a method of controlling the order in which primitives generated during tessellation are output by the tessellation unit. The method involves sub-dividing a patch, selecting one of the two sub-patches which are formed by the sub-division and tessellating that sub-patch until no further sub-division is possible before tessellating the other (non-selected) sub-patch. The method is recursively applied at each level of sub-division. Patches are output as primitives at the point in the method where they do not require any further sub-division. The selection of a sub-patch is made based on the values of one or more flags and any suitable tessellation method may be used to determine whether to sub-divide a patch. Methods of controlling the order in which vertices are output by the tessellation unit are also described and these may be used in combination with, or independently of, the method of controlling the primitive order.To be accompanied, when published, by Figure 2A of the accompanying drawings.
Anmelder
- Firma
- Imagination Technologies Limited
- Land
- 🇬🇧 Großbritannien
Britisches Halbleiter-Designunternehmen aus Kings Langley, das Grafikprozessor-IP-Kerne (PowerVR) sowie Prozessorarchitekturen für mobile Geräte, Automobil- und eingebettete Systeme entwickelt und lizenziert.
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