CMS Cameron McKenna Nabarro Olswang LLP

Methods, systems, and computer storage media for providing speech-text alignment management using a speech processing engine in an artificial intelligence system are described. The speech processing engine includes a speech-text alignment engine that operates as intermediary between raw spoken language and its corresponding textual representation, ensuring real-time processing and translation tasks. The speech processing engine utilizes a speech encoder to convert spoken language into digital signals that represent its acoustic features. The data then passes through the speech-text alignment engine, which includes a Connectionist Temporal Classification (CTC) layer for temporal and sequence alignment and a modified q-former layer for fine-tuning the speech embeddings to closely match the latent space of text embeddings used by Large Language Models (LLMs). This alignment process enables translating or transcribing spoken content into multiple languages without delay. The speech processing engine also incorporates token swapping to support adapting to various speech patterns and accents effectively.

The present disclosure generally relates to systems and methods for adaptively retransmitting data packets utilizing a biased moving average retransmission time. Systems and methods described herein avoid the risks of retransmission flooding and congestion collapse common to existing out-of-order packet transmission systems by generating, updating, and utilizing a biased moving average retransmission time that adapts to a specific latency of a data flow. By tailoring fast and regular timeout events to this biased moving average retransmission time, the systems and methods described herein can dynamically adapt to in-the-moment network conditions to ensure that data packets reach their intended endpoints.

A disclosed method provides for distributing portions of a database query among different processors of a same host device. The method includes determining query fragments collectively executable to implement the database query; identifying one or more subplans for executing the query fragments; accessing capabilities of a hardware coprocessor of the host device; determining, based on the capabilities stored for the hardware coprocessor, whether a select subplan of the one or more subplans is viable for implementation by the hardware coprocessor; and in response to determining that the select subplan is viable for implementation by the hardware coprocessor, selecting and executing a first distributed execution plan that includes the select subplan and that delegates execution of the select subplan to the hardware coprocessor.

Microscopic light emitting diodes (micro-LEDs) systems having in situ current measurement circuits are described. An example micro-LED system includes a set of micro-LEDs formed in a display substrate and a set of pixel driver circuits formed in a backplane substrate, coupled to the display substrate, where a respective pixel driver circuit is to provide current to a respective micro-LED during a first mode of operation for the set of micro-LEDs. The micro-LED system further includes a current measurement circuit, formed in the backplane substrate, comprising an operational amplifier configured to drive a source-follower transistor. The micro-LED system further includes a set of pass transistors to, on a per pixel driver circuit basis, selectively redirect current from one or more of the set of pixel driver circuits to the current measurement circuit allowing for in situ measurement of the redirected current within the backplane substrate.

Systems and methods for automatically reducing regression for a software update applied to a population of nodes in a computing environment. A regression detector performs a health analysis of the software update and detects a software regression attributed to the software update with high confidence by performing a combination of data analyses. In some examples, a time window-based observational study, a control-based observational study, and an anomaly detection analysis are performed for identifying various regression conditions. When the identified regression conditions match a set of high-confidence regression conditions configured for the health analysis, a software regression is detected. In further examples, the regression detector transmits an event based on the detected software regression to prevent the software regression from propagating to additional nodes in the computing environment.

A medium voltage, modular rack system includes: an IT (Information Technology) rack configured to house a plurality of compute resources; a power panel rack comprising a plurality of power connectors and configured to operatively couple the compute resources to a low voltage DC power source; an energy storage rack comprising one or more energy storage devices, wherein each of the energy storage devices is configured to store energy from and provide energy to the low voltage DC power source; a power conversion rack comprising power conversion devices configured to convert a medium voltage power source to the low voltage DC source; and a medium voltage rack configured to receive a medium voltage AC source and a medium voltage DC source.

A method for processing a glass preform for hollow core fiber comprises providing a length of glass preform for hollow core fiber from which a portion is to be removed in order to terminate the preform forming an end face. The preform comprises a transverse cross-sectional structure comprising a hollow core surrounded by a plurality of capillaries defining a plurality of voids encased by a jacket tube, wherein the hollow core and the plurality of voids extend longitudinally along the length of the preform. The method further comprises positioning the preform using a preform holder attached to a diamond wire saw, wherein the preform holder is configured to clamp the preform equally on both sides of a desired location for cutting. The preform is cut in the desired location using the diamond wire saw.

A mobile computing device (10) is configured to charge a component battery (14, 32, 52). The mobile computing device (10) comprises a power supply unit (20), a computing device battery (12), a processor (18, 504), and a memory (15, 508, 512) storing instructions (16) executable by the processor (18, 504) to control a rate of charging the component battery (14, 32, 52) from either the power supply unit (20) or the computing device battery (12) based at least in part on a magnitude of throttled power provided to the processor (18, 504).

Systems, methods, and computer program products are described herein related to on-demand battery life with adaptive performance control, which achieves a target battery life (e.g., based on user request) by dynamically regulating a battery discharge slope. A power mode is implemented with adaptive power level (PL) limits (e.g., average PL limit and maximum PL limit) to manage battery life over time intervals. The discharge rate of the battery is controlled by dynamically adapting PL limits of the power provided to the computing device to align the remaining battery life with a target battery life. PL limits can be adapted based on a hardcoded mapping of a target performance levels or based on a machine learning model. Computing device performance is adaptively enhanced on demand for usage scenarios by temporary adjustment of PL limits when estimated battery life is within a margin of target battery life.

A processor system may include multiple circuits that are each powered by their own power rails. Incomplete cycling of system power may fail to discharge memory circuits, leaving that data vulnerable to unauthorized access upon reboot. A processor system includes a boot detection circuit that, upon detecting a threshold voltage on a first power rail in the bootup sequence, captures voltage measurements on each of the remaining power rails in multiple time periods, wherein the captured voltage measurements may be analyzed to determine whether the voltages on the power rails fully cycled to a sufficiently low voltage and remained there for a sufficient time to ensure that memory circuits adequately discharged. The power system may proceed to generate an indication of complete reset or incomplete reset depending on the voltage measurements stored in the memory. In this way, the confidentiality of data previously stored in the memory circuits is protected.