Steuerung der Leistungszustandseinschränkung in einem Prozessor

Details

Veröffentlichungs-Nr.

EP3674847

Aktenzeichen

EP19211139

Anmeldetag

25. November 2019

Veröffentlichung

9. August 2023

Erteilung

9. August 2023

Rechtsraum

EP

IPC

G06F1/3206G06F1/3296

Abstract

In an embodiment, a processor for demotion includes a plurality of cores to execute instructions and a demotion control circuit. The demotion control circuit is to: for each core of the plurality of cores, determine an average count of power state break events in the core; determine a sum of the average counts of the plurality of cores; determine whether the average count of a first core exceeds a first demotion threshold; determine whether the sum of the average counts of the plurality of cores exceeds a second demotion threshold; and in response to a determination that the average count of the first core exceeds the first demotion threshold and the sum of the average counts exceeds the second demotion threshold, perform a power state demotion of the first core. Other embodiments are described and claimed.

Anmelder

Firma

Intel Corporation

Land

🇺🇸 USA

Fachgebiete