Vorrichtung, Verfahren und System zur Verminderung des Verziehens eines Zusammengesetzten Chiplets

Details

Veröffentlichungs-Nr.

EP4325567

Aktenzeichen

EP23185988

Anmeldetag

18. Juli 2023

Veröffentlichung

21. Februar 2024

Rechtsraum

EP

IPC

H01L25/065H01L21/60H01L25/18H01L23/31

Abstract

Techniques and mechanisms to mitigate warping of a composite chiplet. In an embodiment, multiple via structures each extend through an insulator material in one of multiple levels of a composite chiplet. The insulator material extends around an integrated circuit (IC) component in the level. For a given one of the multiple via structures, a respective annular structure extends around the via structure to mitigate a compressive (or tensile) stress due to expansion (or contraction) of the via structure. In another embodiment, the composite chiplet additionally or alternatively comprises a structural support layer on the multiple levels, wherein the structural support layer has formed therein or thereon dummy via structures or a warpage compensation film.

Anmelder

Firma

INTEL Corporation

Land

🇺🇸 USA

Fachgebiete