Verfahren zur Rückseitendünnung einer Integrierten Schaltung
Anmelder: IHP GmbH - Innovations for High Performance Microelectronics / Leibniz-Institut für innovative Mikroelektronik 🇩🇪
Details
- Veröffentlichungs-Nr.
- EP4546397
- Aktenzeichen
- EP23206357
- Anmeldetag
- 27. Oktober 2023
- Veröffentlichung
- 30. April 2025
- Rechtsraum
- EP
- IPC
- H01L21/306
Abstract
The present invention relates to a method for backside thinning of an integrated circuit, herein referred to as IC. The method comprises the steps of:- providing the IC, wherein the IC comprises a Si-containing substrate forming the backside of the IC, a Si-based insulator-containing shallow trench isolation, herein referred to as STI, arranged on the Si-containing substrate and one or more functional IC components arranged within the STI and/or on the STI opposite the Si-containing substrate,- providing a polishing pad,- applying a slurry onto the polishing pad and/or the backside of the IC, the slurry being configured to provide an at least Si-selective removal upon exertion of a mechanical shear force,- bringing the backside of the IC and the polishing pad into contact with each other, and- thinning the IC to a thickness of the Si-containing substrate of 1 µm or less by exerting a mechanical shear force to the IC's backside while maintaining the contact between the IC and the polishing pad up.
Anmelder
- Firma
- IHP GmbH - Innovations for High Performance Microelectronics / Leibniz-Institut für innovative Mikroelektronik
- Land
- 🇩🇪 Deutschland
Deutsches Forschungsinstitut (Leibniz-Institut) mit Sitz in Frankfurt (Oder), das an Hochleistungs-Mikroelektronik forscht, darunter Silizium-Germanium-Technologien und Halbleiterschaltungen für Kommunikations- und Sensoranwendungen.
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Eisenführ Speiser
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