Umlenkung in einem Prozessorcache

Details

Veröffentlichungs-Nr.

EP4575811

Aktenzeichen

EP24220038

Anmeldetag

16. Dezember 2024

Veröffentlichung

4. März 2026

Erteilung

4. März 2026

Rechtsraum

EP

IPC

G06F12/0864G06F12/0895G06F12/128

Abstract

Various example embodiments of a processor cache are presented herein. The processor cache may be configured to support redirection of memory blocks between cache lines, including between cache lines in different sets of the processor cache, thereby improving the efficiency of the processor cache by increasing the utilization of the processor cache and reducing cache misses for the processor cache. The redirection of memory blocks between cache lines may include redirection of a memory block from being stored in a first cache line of a first set of the processor cache which is the default set for the memory block (e.g., when the first set does not have any empty cache lines) to a second cache line of a second set of the processor cache which is not the default set for the memory block (e.g., the second set may be any set having at least one empty cache line).

Anmelder

Firma

Nokia Solutions and Networks Oy

Land

🇫🇮 Finnland

Fachgebiete