Empfänger, Verfahren zur Schätzung eines Leistungsverzögerungsprofils und Verfahren zur Kanalschätzung

Details

Veröffentlichungs-Nr.

EP4672642

Aktenzeichen

EP24184943

Anmeldetag

27. Juni 2024

Veröffentlichung

31. Dezember 2025

Rechtsraum

EP

IPC

H04B17/318H04L5/00H04B7/08H04L25/02

Abstract

According to various examples, a receiver is described, comprising a memory and a processor, the processor being configured to receive, for each of a plurality of receive antennas, a pilot signal via the receive antenna, wherein the pilot signal has a component for each subcarrier of a plurality of subcarriers, generate, for each of the plurality of receive antennas, an intermediate power delay profile estimation processing result by processing the pilot signal received via the receive antenna by one or more first neural network layers combining the components of the pilot signal received via the receive antenna for the sub-carriers, generate a combined intermediate power delay profile estimation processing result by combining the intermediate power delay profile estimation processing results generated for the receive antennas and determine a power delay profile estimate by processing the combined intermediate power delay profile processing estimation result by one or more second neural network layers.

Anmelder

Firma

INTEL Corporation

Land

🇺🇸 USA

Fachgebiete