Statischer Direktzugriffspeicher mit Komplementären Feldeffekttransistoren

Details

Veröffentlichungs-Nr.

EP4718966

Anmeldetag

28. Juli 2025

Veröffentlichung

1. April 2026

Rechtsraum

EP

Abstract

Embodiments herein relate to a Static Random-Access Memory (SRAM) cell having a four-level complementary-field effect transistor (CFET) structure. In an example implementation, a first, bottom level includes one or more n-channel metal-oxide-semiconductor field-effect transistors (nMOSs), a second level includes one or more pMOS transistors, a third level includes one or more pMOS transistors and a fourth, top level includes one or more nMOS transistors. The transistors can be connected using conductive paths which extend in bottom metal layers, top metal layers and intermediate metal layers between the two pMOS levels. In an example implementation, a six-transistor memory cell is provided.

Anmelder

Firma

INTEL Corporation

Land

🇺🇸 USA