Speicher mit Ferroelektrischen oder Antiferroelektrischen Kondensatoren und Dioden in Gestapelten Konfigurationen

Details

Veröffentlichungs-Nr.

EP4718972

Anmeldetag

8. August 2025

Veröffentlichung

1. April 2026

Rechtsraum

EP

Abstract

An integrated circuit die includes a first surface having conductive features and a second surface opposite the first surface. A device layer is proximate the first surface and includes a plurality of transistors. The device layer is between a memory layer and the first surface. The memory layer includes memory circuitry having a plurality of memory cells memory cells arranged in a cross-bar array. Each memory cell comprises first and second diodes, and a capacitor. Each diode includes an insulator material between electrodes. In some embodiments, the first and second diodes share an electrode. The capacitor includes a ferroelectric or an antiferroelectric material between electrodes.

Anmelder

Firma

INTEL Corporation

Land

🇺🇸 USA